EDN

System Verilog configurable coverage model in an OVM setup – concept of reusability

With the advent of a new era in verification technology based on an advanced HVL like System Verilog, the concept of random stimulus based verification was born, to verify today’s multi‐million gate ...
EDN

How Verilog-AMS accelerates transistor modeling

Before circuit design can begin on any advanced semiconductor manufacturing process, the electrical behavior of the devices — transistors, diodes, resistors — must be described accurately in so-called ...
Semiconductor Engineering

Neuromorphic photonic circuit modeling in Verilog-A

“One of the significant challenges in neuromorphic photonic architectures is the lack of good tools to simulate large-scale photonic integrated circuits. It is crucial to perform simulations on a ...
TechRepublic

Verilog Modeling of Wi-Fi MAC Layer for Transmitter

The main objective is to design and implementation Wi-Fi MAC transmitter using Verilog. For the wireless communication in RF range IEEE 802.11 is one of the many standards available. IEEE 802.11b ...
Design-Reuse

Hitachi Endorses Model Technology ModelSim for Verilog Simulation

PORTLAND, Ore.--(BUSINESS WIRE)--Oct. 3, 2001--Model Technology(TM), a Mentor Graphics company, today announced that the ModelSim® hardware description language (HDL) simulator has received Verilog ...
Semiconductor Engineering

Using Symbolic Simulation For SRAM Redundancy Repair Verification

Innovations in Very Deep Sub-Micron technologies, such as the advent of three-dimensional FinFET transistor structures, have facilitated the implementation of very large embedded SRAM memories in ...
Design-Reuse

How Verilog-AMS accelerates transistor modeling

Before circuit design can begin on any advanced semiconductor manufacturing process, the electrical behavior of the devices — transistors, diodes, resistors — must be described accurately in so-called ...